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 ACTS630MS
January 1996
Radiation Hardened EDAC (Error Detection and Correction)
Pinouts
28 PIN CERAMIC DUAL-IN-LINE, MIL-STD-1835 DESIGNATOR CDIP-T28, LEAD FINISH C TOP VIEW
DEF 1 DB0 2 DB1 3 DB2 4 DB3 5 DB4 6 DB5 7 DB6 8 28 VCC 27 SEF 26 S1 25 S0 24 CB0 23 CB1 22 CB2 21 CB3 20 CB4 19 CB5 18 DB15 17 DB14 16 DB13 15 DB12
Features
* Devices QML Qualified in Accordance with MIL-PRF-38535 * Detailed Electrical and Screening Requirements are Contained in SMD# 5962-96721 and Intersil's QM Plan * 1.25 Micron Radiation Hardened SOS CMOS * Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si) * Single Event Upset (SEU) Immunity: <1 x 10 (Typ) * Dose Rate Upset . . . . . . . . . . . . . . . . >10 * Dose Rate Survivability . . . . . . . . . . . >10 * Latch-Up Free Under Any Conditions * Military Temperature Range . . . . . . . . . . . . . . . . . . -55oC to +125oC * Significant Power Reduction Compared to ALSTTL Logic * DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V * Input Logic Levels - VIL = 0.8V Max - VIH = VCC/2 Min * Input Current 1A at VOL, VOH * Fast Propagation Delay . . . . . . . . . . . . . . . . 37ns (Max), 24ns (Typ)
11 12 -10
Errors/Bit/Day
* SEU LET Threshold . . . . . . . . . . . . . . . . . . . . . . . >100 MEV-cm2/mg RAD (Si)/s, 20ns Pulse RAD (Si)/s, 20ns Pulse
DB7 9 DB8 10 DB9 11 DB10 12 DB11 13 GND 14
Description
The Intersil ACTS630MS is a Radiation Hardened 16-bit parallel error detection and correction circuit. It uses a modified Hamming code to generate a 6-bit check word from each 16-bit data word. The check word is stored with the data word during a memory write cycle; during a memory read cycle a 22-bit word is taken form memory and checked for errors. Single bit errors in the data words are flagged and corrected. Single bit errors in check words are flagged but not corrected. The position of the incorrect bit is pinpointed, in both cases, by the 6-bit error syndrome code which is output during the error correction cycle. The ACTS630MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of a radiation hardened, high-speed, CMOS/SOS Logic Family. The ACTS630MS is supplied in a 28 lead Ceramic Flatpack (K suffix) or a 28 Lead Ceramic Dual-In-Line Package (D suffix).
28 PIN CERAMIC FLATPACK, MIL-STD-1835 DESIGNATOR CDFP3-F28, LEAD FINISH C TOP VIEW
DEF DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 DB8 DB9 DB10 DB11 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC SEF S1 S0 CB0 CB1 CB2 CB3 CB4 CB5 DB15 DB14 DB13 DB12
Ordering Information
PART NUMBER 5962F9672101VXC 5962F9672101VYC ACTS630D/Sample ACTS630K/Sample ACTS630HMSR TEMPERATURE RANGE -55oC -55oC to to +125oC +125oC SCREENING LEVEL MIL-PRF-38535 Class V MIL-PRF-38535 Class V Sample Sample Die PACKAGE 28 Lead SBDIP 28 Lead Ceramic Flatpack 28 Lead SBDIP 28 Lead Ceramic Flatpack Die
25oC 25oC 25oC
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
Spec Number File Number
1
518786 3204.1
ACTS630MS Function Tables
Control Functions
MEMORY CYCLE CONTROL S1 S0 EDAC FUNCTION DATA I/O CHECKWORD ERROR FLAGS SEF DEF
WRITE READ READ READ
Low Low High High
Low High High Low
Generates Checkword Read Data and Checkword Latch and Flag Error Correct Data Word and Generate Syndrome Bits
Input Data Input Data Latch Data Output Corrected Data
Output Checkword Input Checkword Latch Checkword Output Syndrome Bits
Low Low Enabled Enabled
Low Low Enabled Enabled
Check Word Generation
16-BIT DATA WORD CHECKWORD BIT 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
CB0 CB1 CB2 CB3 CB4 CB5
X X
X X X X X
X X
X X X X X X X X X
X X
X
X X
X X X X
X X X
X
X
X X X X X X
X
X
X
X
X
X
X
X
X
X
NOTE: The six check bits are parity bits derived from the matrix of data bits as indicated by "x" for each bit
Error Syndrome Codes
ERROR LOCATIONS SYNDROME ERROR CODE CB0 CB1 CB2 CB3 CB4 CB5 DB 0 L L H L H H 1 L H L L H H 2 H L L L H H 3 L L H H L H 4 L H L H L H 5 H L L H L H 6 H L H L L H 7 H H L L L H 8 L L H H H L 9 L H L H H L 10 L H H L H L 11 H L H L H L 12 H H L L H L 13 L H H H L L 14 H L H H L L 15 H H L H L L 0 L H H H H H 1 H L H H H H 2 H H L H H H CB 3 H H H L H H 4 H H H H L H 5 H H H H H L NO ERROR H H H H H H
Error Functions
TOTAL NUMBER OF ERRORS 16-BIT DATA 0 1 0 1 2 0 6-BIT CHECKWORD 0 0 1 1 0 2 SEF Low High High High High High ERROR FLAGS DEF Low Low Low High High High DATA CORRECTION Not Applicable Correction Correction Interrupt Interrupt Interrupt
Spec Number 2
518786
ACTS630MS Die Characteristics
DIE DIMENSIONS: 171 mils x 159 mils 6.7m x 6.3m METALLIZATION: Type: Al/Si/ Metal 1 Thickness: 7.125kA 1.125kA Metal 2 Thickness: 9kA 1kA GLASSIVATION: Type: SiO2 Thickness: 8kA 1kA WORST CASE CURRENT DENSITY: < 2.0 x 105A/cm2 BOND PAD SIZE: 110m x 110m 4.3 mils x 4.3 mils
Metallization Mask Layout
ACTS630MS
DB2 DB1 DB0 DEF VCC SEF S1 (4) (3) (2) (1) (28) (27) (26)
DB3 (5) DB4 (6) DB5 (7) DB6 (8) DB7 (9) DB8 (10) DB9 (11)
(25) S0 (24) CB0 (23) CB1 (22) CB2 (21) CB3 (20) CB4 (19) CB5
(12) (13) (14) (15) (16) (17) (118) DB10 DB11 GND DB12 DB13 DB14 DB15
Spec Number 3
518786
ACTS630MS
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. Taiwan Limited 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
Spec Number 4


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